Salary Details
- Project Associate – II – Rs. 35000 / p.m.
Important Dates
-
Opening Date04July2023
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Closing Date30July2023
Age Limit
- Less than 35 years
Education Qualification
- B Tech/B E in Electronics and Communication Engg and M Tech in Microelectronics and VLSI Design / VLSI System Design / Electronic System Design
- Expertise in Verilog coding, Familiarized with Vivado/ Cadence/ Synopsys tools for FPGA/ ASIC Design flow
Selection Process
- Shortlisted candidates will have to appear for a written test and interview.
- Shortlisted candidates will be intimated through email.
Vacancy Details
- Project Associate – II -01
Application Link